MTS Metrology and Inspection, ULP CMOS Advanced Packaging - Singapore - Globalfoundries Engineering Private Limited

    Globalfoundries Engineering Private Limited
    Globalfoundries Engineering Private Limited Singapore

    2 days ago

    Full time
    Description
    • The advanced packaging metrology engineer will develop and implement critical capabilities for enabling early feedback loops and quality compliance to technical requirements for technology nodes across the ULP CMOS product lines for multiple development opportunities.
    • This role supports advanced packaging metrology capability enablement and requires strong partnership and collaboration with the broader SGP module engineering team and process integration to develop and monitor health of these programs.
    • Investigate root cause of any control issues as well as establish appropriate control strategy and monitoring through the program early ramp.
    • Work with internal and external metrology, measurements and inspection suppliers to maximize metrology feedback to the factory.
    • Partner with yield characterization and co lead data analysis methodologies to determine yield limiters correlated to in-line defectivity or measurements.
    • Support process module engineering activities to improve cost, cycle time, and manufacturing readiness.
    • Ensure methods and processes in place to monitor and quality control all technical requirements for device and advanced packaging structures being developed
    • Analyze various data, physical, electrical or defect reports to determine trends and recommend corrective actions
    • May require creation of presentations to provide occasional management or external customer updates.
    • Work and collaborate other projects and/or assignments as needed

    Other Responsibilities:

    • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs
    • Travel <10% to other Global Foundries facilities may be necessary

    Required Qualifications:

    • Bachelor's degree in engineering, Material science or related technical field
    • Minimum of 7 years of semiconductor product yield or test engineering, circuit design, process integration or process engineering experience
    • Strong candidates will have demonstrated experience in packaging metrology techniques, defect inspection techniques and methodologies, solid understanding of electrical parametric correlation to product yield, and good knowledge of semiconductor processing and process integration.
    • Excellent verbal and written communication skills.
    • Strong interpersonal skills and ability to work effectively within a global matrixed team or environment.
    • Prior experience in developing, transferring, implementing, ramping and sustaining process technologies in early development through manufacturing ramp into production
    • Strong fundamental understanding of circuit design and test, solid state device physics, submicron FET architecture, and the implications of electrical characteristics and performance on yield and product behavior.
    • Candidates must have capabilities in the design, execution, and analysis of experiments. - Proven project management, peer leadership, and mentoring skills. Preferred Qualifications: - Experience in advanced technology (45nm node or below) is strongly preferred.
    • Experience in digital CMOS or analog circuit or test structure design, characterization, test/debug, yield enhancement and/or product engineering.
    • Fluency in English Language – written & verbal

    Preferred Qualifications:

    • M.S. preferred
    • Experience in advanced packaging technology (45nm node or below) is highly preferred.
    • Experience with advanced metrology and/or optical inspection is a benefit
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