Verification Engineer - Singapore - CHIPGLOBE ASIA PACIFIC PTE. LTD.

Description

• Perform with various activities on RTL design implementation and verification at SoC level.
• Responsible for RTL coding, logical synthesis, functional test plan, test bench development, RTL and gatelevel simulation/verification, code coverage, formal verification, test vector generation and design documentation.
• Work and provide high quality test patterns to the test teams and coordination with design and concept engineering, DFT, synthesis and physical implementation team.
• Pattern development in centralised automated environment with pattern simulation & debug and assist in CPU based pattern development methodology
• Involve in reviewing of the verification plans, coverage plans, test case implementation/enhancement and debug.
• Identify potential areas for automation and propose methodology, implementation and documentation.
• Assist in Genericbased platform approach pattern development process

• Bachelor or Master Degree in Electronic Engineering with 5 years of IC design experience
• Familiar with IC design flow and Verification Concepts
• Experience in SystermC an added advantage
• Basic IP domain knowledge/processor, serial bus protocols.
• Experience in RTL coding, RTL and gatelevel simulation, logic synthesis, static timing analysis, timing closure and verification
• Good understanding of DFT
• Familiar with unix and unix environment
• Proficient in scripting and automation in pattern development environment using PERL/PYTHON/TCL
• Knowhow of HDL and HVL and familiarity with EDA tools(Simulation, debug, functional coverage)
• Good communication and interpersonal skills
• Strong analytical and problem solving skills