Senior Analog Layout Designer - Clementi, Singapore - Zero-Error Systems (ZES) Pte Ltd

Zero-Error Systems (ZES) Pte Ltd

Verified Company

Clementi, Singapore

6 days ago

Posted by:

Wei Jie

beBee Recruiter

Description

Be part of the revolution

Together, we revolutionize space, automotive, robotics (including UAV, UGV), IoT and aviation industries with cutting-edge innovations in ultra-reliability electronics that protect lives in all operating environment.

The work we do is immensely challenging but satisfying.

Our people are not afraid to question the status quo, enter unchartered waters to solve meaningful problems and push the boundaries of science.

If there is fire in your belly to make an outsized impact in the emerging industries, join our team

Senior Analog Layout Designer

Job Identification:

Position Title: Senior Analog Layout Designer
Division/Dept

/Section:

Engineering

Organizational Relationship:

Reports to Team lead
Supervises Intern

Job Objective/s:

Roles and Responsibilities:

Fast development of analog IC physical designs, including layout drawing, DRC, LVS
Layout extractions and analysis for IC designers
Develop analog and/or digital library cells in various technologies (e.g. CMOS & SOI)
Layout digital cells for various tradeoffs (including speed, power, area, reliability)
Layout analog circuits and IO circuits
Characterize digital cell cells for timing and power analyses
Construct test structures for validating various digital and analog cells
Layout integration and optimization
Advise IC designers for best layout practice

Authorities:

Work with the IC design team to deliver IC physical designs
Support the team lead for layout design integrations

Requirements:

Minimum Requirements

Polytechnical degree in electrical engineering or related field
Strong experience in analog physical design, particularly bandgap, amplifier, comparator, LDO, current sensing, power switch, etc.
Proficiency with industrystandard tools such as Cadence, Spectre, HSPICE, and Matlab
Familiarity with CMOS, BiCMOS, and other process technologies
Excellent problemsolving skills and ability to work in a fastpaced startup environment
At least 3year experience of analog layout design with at 2 IC product tapeouts.

Preferred Requirements

Bachelor's degree or above
Some understanding of circuit analysis and implementation
Strong expertise in power management including DC/DC converter design.
Able to do design verifications

Measures of Performance:

Key Result Area

Physical Design
IC circuit design

Measure of Performance

Together with the layout engineer, successful delivery of the physical IC designs that meet the specifications
Some understanding of the implemented circuits, and able to assist IC designers with design verifications.