RTL Design Engineer - Singapore - MARQUEE SEMICONDUCTOR SINGAPORE PTE. LTD.

Description

• Highly motivated and driven to face the challenging design problems
• Architecture and Micro-architecture of complex digital SoCs and mixed signals SoCs
• Be able to communicate with system architects and decipher system requirements and develop architectural specification of the SoC
• Understanding the future market requirements and develop micro-architecture for the silicon to serve multiple generations of market is a big plus
• Be able to micro-architect the chip considering low power and high-performance techniques
• Complete sign-off GDSII working with DV, DFT and PD engineering teams.
• Be able to comprehend usual service level agreement features – Power, Performance, Area and Customer Schedule, and accordingly plan the development.

Preferred Expertise:

• Architecting, micro-architecting and designing SOC for embedded processors for storage, IoT, security and compute applications
• One or more of Protocol/System knowledge - PCIe, CXL, UCIe, NVMe, USB4.0, DDR, AXI, CHI, AHB, RISC-V
• Functional safety, power management, coherency, security
• Design Techniques – Low-power, UPF, Clock Domain Crossing (CDC), Booting/Reset Flow
• SW and/or hardware validation
• Scripting Languages – Shell scripting, Python, TCL, PERL etc.