- Works with the front-end design team to complete the chip floorplan , clock architecture, and powerplan .
- Takes charge of the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tapeout.
- Researches the physical design methodology of advanced process nodes, and builds an automatic physical design platform.
- Holds a bachelor's degree or above in electronic engineering, microelectronics, or computer science.
- At least five years of work experience in the digital backend design field. Hands-on project experience is required. Tapeout experience at advanced technology is preferred.
- Those with experience in TCL , Perl or Python script development and familiar with EDA tool design will be plus.
- Strong communication ability, good confidence and self-motivation.
- Bilingual in English and Chinese to coordinate with related stakeholders and with good teamwork spirit.
- Salary is negotiable for excellent candidates. e.g. more experienced Staff Engineers with leading roles
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SOC Physical Design Engineer - Singapore - PERSOLKELLY SINGAPORE PTE. LTD.
Description
Roles & ResponsibilitiesOur clien is one of the leader in the semi-con industry, they are seeking for multiple engineer to join the team. The ideal candidate should posses expertise in chip layout, power management and physical desigining experiences.
Location: One North
Salary up to $10000
Position Requirements:
Interested candidates may apply through the application system. We regret to inform only Shortlisted candidates will be notified.
PERSOLKELLY Singapore Pte Ltd
• RCB No E EA License No. 01C4394
• EA Registration No. R Ling Kai Jin)
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Tell employers what skills you havePerl
Static Timing Analysis
Timing Closure
Floorplanning
TCL
EDA
Reliability
Power Management
Python
Budgeting
IC
Physical Design
Electrical Engineering
Layout
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